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TE CH
T62M0001A
T62M0001A
Features
Low Noise (-90dBV typical) Low Distortion (0.17% typical) Built -in 64 K SRAM Sleep Mode Function Two Control Modes Selection: Easy Mode Using Parallel Data u-COM Mode Using Serial Data Auto-Mute Function Built-in Automatic Reset Circuit Pin Compatible with M65831
Digital Sound Processor With 64K SRAM
Description
T62M0001 is a digital echo/surround processor IC utilizing CMOS technology. Analog signal to T62M0001 is digitized by a built-in A/D converter and then stored in the internal memory. After an adjustable delay time, data in the memory is read and converted back to analog signal via the other D/A converter. With the built-in 64K SRAM, T62M0001 can create very high performance echo/surround sound effect and meet the application of A/V system such as CD player VCD,DVD ....etc.
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Part Number Examples
Part NO. T62M0001A-D T62M0001A-K Pkg 24-SOP 24-DIP Description 24-SOP 600mil-24-DIP
TM Technology Inc. reserves the right P. 1 to change products or specifications without notice.
Publication Date: JUN. 2002 Revision:A
tm
TE CH
T62M0001A
Pin Configuration
VDD XIN XOUT D1/REQ D2/SCK D3/DATA D4/IDSW TEST EASY/u-COM SLEEP D-GND A-GND
1 2 3 4 5 6 7 8 9 10 11 12
c
24 23 22 21 20 19 18 17 16 15 14 13
VCC LPF1 IN LPF1 OUT OP1 OUT OP1 IN REF CC1 CC2 OP2 IN OP2 OUT LPF2 IN LPF2 OUT
24 PINS DIP/SOP
TM Technology Inc. reserves the right P. 2 to change products or specifications without notice.
Publication Date: JUN. 2002 Revision:A
tm
VDD XIN
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T62M0001A
Pin Description
Symbol I/O P Digital supply voltage I Oscillator input O Oscillator output Easy mode : inputs D1 data D1/REQ I 4 Function Pin no. 1 2 3
XOUT
u-COM mode :inputs request data
Easy mode : inputs D2 data D2/SCK I 5
u-COM mode : inputs shift clock
Easy mode : inputs D3 data D3/DATA I 6
u-COM mode : inputs serial data
D4/IDSW TEST I Easy mode : inputs D4 data 7 8 9 10 11
u-COM mode : controls ID code
I L = normal mode H = easy mode
EASY/u-COM I SLEEP D-GND
L = u-COM mode I H = sleep mode L = normal mode G Digital ground
TM Technology Inc. reserves the right P. 3 to change products or specifications without notice.
Publication Date: JUN. 2002 Revision:A
tm
TE CH
T62M0001A
Symbol A-GND LPF2 OUT LPF2 IN OP2 OUT OP2 IN CC2 CC1 REF OP1 IN OP1 OUT LPF1 OUT LPF1 IN VCC
I/O G Analog ground
Function
Pin no. 12 13 14 15 16 17 18 19 20 21 22 23 24
O Low pass filter 2 output I Low pass filter 2 input O Integrator 2 output I Integrator 2 input - Current control 2 - Current control 1 - Analog reference voltage ( = 1/2 VCC ) I Integrator 1 input I Integrator 1 output - Low pass filter 1 output O Low pass filter 1 input P Analog supply voltage
P : supply voltage I : input pin
G : ground O : output pin
TM Technology Inc. reserves the right P. 4 to change products or specifications without notice.
Publication Date: JUN. 2002 Revision:A
tm
D4 L L L L L L L L H H H H H H H H
TE CH
T62M0001A
Function description
1.Easy mode (parallel data input)
When the pin EASY/ - COM = "High", then in the easy mode. D3 L L L L H H H H L L L L H H H H D2 L L H H L L H H L L H H L L H H D1 L H L H L H L H L H L H L H L H fs Fck/3 Fck/3 Fck/3 Fck/3 Fck/3 Fck/3 Fck/3 Fck/3 Fck/6 Fck/6 Fck/6 Fck/6 Fck/6 Fck/6 Fck/6 Fck/6 Td 12.3 24.6 36.9 49.2 61.4 73.7 86.0 98.3 110.6 122.9 135.2 147.5 159.7 172.0 184.3 196.6
Note : f s : sampling frequency (Hz) ; Fck : oscillator frequency(example Fck=2MHz) Td : delay time (msec)
TM Technology Inc. reserves the right P. 5 to change products or specifications without notice.
Publication Date: JUN. 2002 Revision:A
tm
TE CH
T62M0001A
2.u-COM mode (serial data input)
When the pin EASY/ u - COM = "Low" , then in the u-COM mode. The timing is shown as the diagram below:
H Delay time = Sleep mode
H ID code = Mute
This timing chart shows that delay time is set by serial data from u-COM. DATA signal is latched at the falling edge of SCK signal, the last ten datas are set at the rising edge of REQ signal when ID codes are satisfied.
ID1, ID3 ID2 ID4
= = =
Low High Equal to IDSW
TM Technology Inc. reserves the right P. 6 to change products or specifications without notice.
Publication Date: JUN. 2002 Revision:A
tm
TE CH
T62M0001A
REQ, SCK, DATA input timing
Symbol t1 ds t2 t3 t4 t5
Parameter Min. SCK pulse width SCK pulse duty DATA setup time DATA hold time REQ hold time REQ pulse width 250 100 100 100 250
Limits Typ. 50 t1/2 t1/2 Max. -
Unit ns % ns ns ns ns
TM Technology Inc. reserves the right P. 7 to change products or specifications without notice.
Publication Date: JUN. 2002 Revision:A
tm
3.Mute
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T62M0001A
(1) Easy mode Automatic mute upon changing delay time, cancelling SLEEP mode and power on. (2) u-COM MUTE=H : mute. MUTE=L : automatic mute. Automatic mute : Delay signal before change mode Delay signal after change mode
(a) Upon changing delay time Delay signal
(b) Upon cancel sleep mode Delay signal
Power on (c) Upon power on
TM Technology Inc. reserves the right P. 8 to change products or specifications without notice.
Publication Date: JUN. 2002 Revision:A
tm
TE CH
T62M0001A
4.SLEEP mode
SLEEP data is : H=clock and RAM stop to reduce circuit current (SLEEP mode) L=normal operation
5.System reset
Automatically reset power-on. The reset time is about 120 m second. Delay time is set at 147.5 m second.
TM Technology Inc. reserves the right P. 9 to change products or specifications without notice.
Publication Date: JUN. 2002 Revision:A
tm
TE CH
T62M0001A
Absolute maximum rating (Ta=25C,unless otherwise noted)
symbol Vcc Icc Pd Topr Tstg paramatic Supply voltage Circuit current Power dissipation Operating temperature Storage temperature ratings 6 100 1.7 -20~75 -25~125 unit V mA W
C C
Recommended operating conditions
symbol VCC VDD VCC-VDD fck VIH VIL parameter Supply voltage Supply voltage Difference voltage Clock frequency "H" input voltage "L" input voltage rating Min. 4.5 4.5 -0.3 1 0.7VDD Typ. 5 5 0 2 Max. 5.5 5.5 0.3 3 0.3VDD unit V V V MHz V V
TM Technology Inc. reserves the right P. 10 to change products or specifications without notice.
Publication Date: JUN. 2002 Revision:A
tm
symbol Icc Gv Iccs Vomax THD TMUTE No
TE CH
T62M0001A
Electrical characteristics
(Vcc=5.0V,fin=1KHz,Vi=100mVrms,fck=2MHz,Ta=25C, unless otherwise noted) Parameter Circit current Voltage gain Circit current (Sleep Mode) Max. output voltage Output distorton Mute time Output noise voltage 30KHz L.P.F. Test condition No signal RL=47K Sleep Mode THD=10% fs=666KHz fs=333KHz Min. 1.3 508 508 Typ. 13 -0.5 7 1.6 0.17 0.4 528 528 -90 Max. 20 2.5 10 0.6 1.0 548 548 -80 unit mA dB mA Vrms % % ms ms dBV
Upon changing delay time Upon canceling sleep mode DIN-AUDIO(fs=666KHz)
DC electrical characteristics
symbol Vcc Icc VIH VIL parameter Min. Supply voltage Circuit current "H" input voltage "L" input voltage 4.5 0.7VDD limits Typ. 5 13 Max. 5.5 20 0.3VDD V mA V V unit
TM Technology Inc. reserves the right P. 11 to change products or specifications without notice.
Publication Date: JUN. 2002 Revision:A
tm
100UF/10v 0.1UF 100PF 100PF
TE CH
T62M0001A
VCC
Application circuit
C1 C2 C3 C6 2MHZ Y1 1 2 3 4 U1 VDD XIN XOUT D1 D2 D3 D4 TEST EASY/g-COM SLEEP DGND AGND VCC LPF1_IN LPF1_OUT OP1_OUT OP1_IN REF CC1 CC2 OP2_IN OP2_OUT LPF2_IN LPF2_OUT T62M0001A DGND C17 AGND 0.01UF R10 1 1UF 2.7K C18 24 23 C7 22 560PF 21 C8 20 0.1UF 19 18 17 16 15 0.1UF 14 C15 13 560PF C16 4700PF R9 20K R6 10K R7 18K R8 3K 0.01UF C11 0.33UF C12 0.33UF C13 47UF/10V C10 C4 R1 10K R3 18K C9 1UF R4 20K 4700PF R2 20K 1UF
EASY MODE
C5
IN
1
SETING DELAY TIMES
VCC SW1 1
5 6 7 8 9
R5 30K
C14
2
10 11 12
OUT
VCC 100UF/10v 0.1UF C3 100PF C6 2MHZ 100PF 4 5 2 3 Y1 1 C1 C2 U1 VDD XIN XOUT D1 D2 D3 D4 TEST EASY/g-COM SLEEP DGND AGND VCC LPF1_IN LPF1_OUT OP1_OUT OP1_IN REF CC1 CC2 OP2_IN OP2_OUT LPF2_IN LPF2_OUT T62M0001A DGND C17 AGND 0.01UF 24 23
u-COM MODE
C4 R1 10K
4700PF R2 20K
C5
IN
1
C7 22 560PF 21 C8 20 0.1UF 19 18 17 16 15 0.1UF 14 C15 13 560PF C16 4700PF R6 10K
1UF R3 18K C9 1UF 47UF/10V C10 R4 20K
u-COM
6 7
VCC SW1 1
8 9 2 10 11 12
C11 0.33UF C12 0.33UF C13
R5 30K
C14 0.01UF
R7 18K
R8 3K
R9 20K C18 R10 1UF 2.7K
1
OUT
TM Technology Inc. reserves the right P. 12 to change products or specifications without notice.
Publication Date: JUN. 2002 Revision:A
tm
TE CH
T62M0001A
IC package T62M0001A(24-DIP)
A
A1
D B2 B3 B1 C1 C D2 D1 A1
B
Symbol A A1 B B1 B2 B3 C C1 D D1 D2
Dimension in mm min. 13.21 3.18 0.51 2.24 4.06 14.99 typ. 32.26 2.54 4.57 0~15 0.25 max 14.22 5.08 4.57 2.84 5.08 15.49 min. 0.520 0.125 0.020 0.088 0.16 0.59 -
Dimension in inch typ. 1.270 0.100 0.18 0~15 0.01 max. 0.560 0.20 0.180 0.112 0.20 0.61 -
TM Technology Inc. reserves the right P. 13 to change products or specifications without notice.
Publication Date: JUN. 2002 Revision:A
tm
24
TE CH
T62M0001A T62M0001A(24-SOP)
D 13
.....
E E1 A
.....
1
12
C
S C A L E :"A "
..... e
A2A b Y A1
Z
L' L1'
Symbol A A1 A2 b C D E e E1 L L1 Y
Dimension in mm min. typ. max 2.4 0.05 2.0 0.35 0.4 0.5 0.13 0.15 0.2 14.8 15.0 15.2 8.2 8.4 8.6 1.27 11.63 11.93 12.23 0.3 0.5 0.7 1.7650 0.15 0 10
Dimension in inch min. typ. max. 0.0945 0.002 0.0787 0.0138 0.0157 0.0197 0.0051 0.0059 0.0079 0.5827 0.5906 0.5984 0.3228 0.3307 0.3386 0.05 0.4579 0.4697 0.4815 0.0118 0.0197 0.0276 0.0448 0.0059 0 10
TM Technology Inc. reserves the right P. 14 to change products or specifications without notice.
Publication Date: JUN. 2002 Revision:A


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